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NEW
phyCORE®-AM62Lx FPSC
Arm®Cortex®-A53
Latest processor technology with outstanding price-performance ratio for Linux-based applications
- Dual-Core Cortex-A53 – 5750 Dhrystone MIPS for strong performance
- Best price-performance ratio with tiered prices starting from 26,-
- Scalable and pin compatible with all FPSC SoMs
- On-board LVDS display support with MIPI to LVDS converter (optional)
- Compact & robust – vibration and shock resistant, 6-layer carrier boards possible
- Safe & protected – Secure Boot, Crypto-Engines, Trusted Execution Environment
- Industrial connectivity – 2x Gbit Ethernet, 3x CAN FD, 8x UARTs & LVDS support
- Durable & supported – 15+ years of availability, Yocto Linux & SLCM
The phyCORE-AM62Lx FPSC System on Module (SOM) was specifically developed for cost-optimized industrial applications that still want to benefit from the advantages of a full-featured Linux operating system. It is ideal for applications where low power consumption, high connectivity, and long-term availability are critical – such as industrial automation, EV charging stations, HMI systems, energy and building management systems, security technology, and smart city solutions.
The phyCORE-AM62Lx FPSC offers a powerful yet affordable platform for developers seeking to combine simple system designs with reliable performance. Its low power consumption makes it ideal for battery-powered devices and enables fanless designs. Robust connectivity with two Gigabit Ethernet interfaces, three CAN FDs, and eight UARTs, as well as its resistance to vibration and shock, make it ideal for use in harsh industrial environments.
The scalability of the FPSC standard allows easy adaptation to different performance requirements, while pin compatibility with other phyCORE modules with i.MX 8M Plus and the i.MX 95 minimizes development effort. The integrated secure boot, cryptographic accelerator and lifecycle management (SLCM) ensure long-term secure and stable system use
| Processor | TI AM62Lx |
| Core(s) | Single- or Dual-Core Arm® Cortex®-A53 |
| Clock frequency | up to 1.25 GHz |
| L1 Cache | 32 kB D-chache, 32 kB I-cache per core |
| L2 Cache | shared 256 kB with ECC |
| Internal RAM | shared 160 kB SRAM with ECC |
| Cryptogr. acceleration | AES 128-256, SHA2 224-512, DRBG, SM3, SM4, PKE |
| HW Security | Secure boot, Arm TrustZone®, ext. firewall, secure watchdog/timer/IPC/storage, dedicated security cntlr., etc. |
| Ethernet | 2x Gigabit (1x on-board PHY/ 1x RGMII, all with TSN and AVB) |
| USB | 2x USB2.0 (all dual-role) |
| UART | up to 8 |
| CAN | up to 3x CAN FD |
| I²C | up to 5 |
| SPI | up to 4 (+1x OSPI) |
| MMC/SD/SDIO | up to 2 |
| GPMC | 1x (16-bit) |
| ePWM | up to 3 |
| eCAP, eQEP | up to 3 each |
| Display | MIPI DSI (4-lane) or LVDS or DPI (24-bit) |
| Audio | up to 3x McASP |
| ADC | up to 4 (10-bit) |
| Debugging | JTAG |
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