
phyCORE-MPC5200B-I/O
phyCORE-MPC5200B-I/O
PHYTEC Order Number: VB107
Visit Freescale MPC5200B Product Summary Page to find data sheets, manuals, erratas, application notes, etc...
For support to the development tools please contact the tool developer.
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FAQ
phyCORE-MPC5200B-I/O
CPU: MPC5200B
CPU: it applies to all CPUs which contain the G2 Core
Inititialisation of the FPU is necessary after reset!!
Author: Jan Kobler, jankobler@koblersystems.de
Date: 2008.12.18
The following text can be copied into an assembler file.
This code has been compiled with the GNU Compiler gcc 4.3.2
and tested on a Phytec phyCORE-MPC5200B-I/O board.
#####################################################################################
# Initialisation of the FPU is necessary after reset!!
#
# G2 PowerPC Core Reference Manual, Rev. 1
# www.nxp.com
#
# G2CORERM.pdf page 86: Before the stfd instruction is used to store the contents
# of an FPR to memory, the FPR must have been initialized after reset (explicitly
# loaded with any value) by using a floating-point load instruction.
#
# G2CORERM.pdf page 211: After Hard Reset and Power-On Reset FPRs are in an unknown state
#
# A better explanation is in the errata of the IBM 750CXe
# URL: www-01.ibm.com
# 750CXe_Err_DD3.X.pdf page 9
# A stfd can cause the part to hang if its source FPR has powered up in a certain state.
#
#####################################################################################
# add to your startup code the function __fpu_init
.global __fpu_init
__fpu_init:
# Load any address into r3 which is 8byte aligned and has read access at
# the current state of the start up
# Here an address in the flash is loaded. When the board is booted
# high (0xfff00100) it is sure that the address 0xfff00000 can be read
# right after the reset
#
# load value 0xfff00000 into r3
lis r3, 0xfff0 #
#
lfd f0, 0(r3) # load floating-point double from address r3
lfd f1, 0(r3) # load floating-point double from address r3
lfd f2, 0(r3) # load floating-point double from address r3
lfd f3, 0(r3) # load floating-point double from address r3
lfd f4, 0(r3) # load floating-point double from address r3
lfd f5, 0(r3) # load floating-point double from address r3
lfd f6, 0(r3) # load floating-point double from address r3
lfd f7, 0(r3) # load floating-point double from address r3
lfd f8, 0(r3) # load floating-point double from address r3
lfd f9, 0(r3) # load floating-point double from address r3
lfd f10, 0(r3) # load floating-point double from address r3
lfd f11, 0(r3) # load floating-point double from address r3
lfd f12, 0(r3) # load floating-point double from address r3
lfd f13, 0(r3) # load floating-point double from address r3
lfd f14, 0(r3) # load floating-point double from address r3
lfd f15, 0(r3) # load floating-point double from address r3
lfd f16, 0(r3) # load floating-point double from address r3
lfd f17, 0(r3) # load floating-point double from address r3
lfd f18, 0(r3) # load floating-point double from address r3
lfd f19, 0(r3) # load floating-point double from address r3
lfd f20, 0(r3) # load floating-point double from address r3
lfd f21, 0(r3) # load floating-point double from address r3
lfd f22, 0(r3) # load floating-point double from address r3
lfd f23, 0(r3) # load floating-point double from address r3
lfd f24, 0(r3) # load floating-point double from address r3
lfd f25, 0(r3) # load floating-point double from address r3
lfd f26, 0(r3) # load floating-point double from address r3
lfd f27, 0(r3) # load floating-point double from address r3
lfd f28, 0(r3) # load floating-point double from address r3
lfd f29, 0(r3) # load floating-point double from address r3
lfd f30, 0(r3) # load floating-point double from address r3
lfd f31, 0(r3) # load floating-point double from address r3
blr # Branch
#####################################################################################
# call the function __fpu_init in your start up code
#
# at first the FPU has to be enabled by setting the FP bit (floating point available)
# in the MSR
#
# load the current value of the msr
mfmsr r3 # move msr into r3
ori r3, r3, 0x2000 # or immediate
mtmsr r3 # move r3 into msr
# save the new value into the msr
# now call the function __fpu_init
bl __fpu_init # Branch
# continue your own startup code
Auf der Homepage von NXP auf der MPC5200 Product Summary Page finden Sie Application Notes, Datasheets und Reference Manual und vieles mehr zu dem MPC5200 Controller
Viele fertige IP-Cores für diverse Aufgaben, Schnittstellen usw. kann man im Internet beim Hersteller von FPGAs finden und in einigen IP-Cores Sammlungen. Eine umfangreiche Sammlung finden Sie z.B. unter http://www.opencores.org/
Linux
Bei einem U-Boot Update gilt es noch folgendes zu beachten:
Der U-Boot des phyCORE-MPC5200B-tiny lädt seine Umgebungsvariablen (environment) per Default aus dem externen EEPROM. Zur Auslieferungszeit ist dort bereits ein gültiger Inhalt incl. der MAC-Adresse hinterlegt. Ein Update des U-Boot codes im Flash verändert den EEPROM Inhalt nicht. Somit verwendet der U-Boot bei einem Neustart wieder den vorhandenen EEPROM Inhalt. Soll auf das im U-Boot Code hinterlegte Defaultenvironment zurückgegriffen werden, sind folgende Schritte anzuwenden:
1. Ungültigmachen des EEPROM Inhalts durch den U-Boot Befehl "eeprom write 0 0 f"
2. Neustart des Systems
3. Eingabe der MAC-Adresse mit "setenv ethaddr 00:50:c2:12::34:56 (bitte hier die Adresse des MAC-Aufklebers verwenden)
4. Eingabe von "saveenv" zum Abspeichern der Variablen im EEPROM
Der Zugriff auf die SPI Schnittstelle ist mit einem „generic“ Treiber nicht möglich. Die Kommunikation über die SPI Schnittstelle hängt von dem SPI-Device ab, das an die SPI Schnittstelle angeschlossen ist. Aus diesem Grund steht kein SPI Node unter /dev und /sys zur Verfügung. Um die Arbeit mit der SPI Schnittstelle zu erleichtern, steht im Linux-Kernel ein SPI Framework zur Verfügung. Eine detaillierte Beschreibung zu dem SPI Framework finden Sie im Kernel-Pfad unter Documentation/SPI/SPI-Summary
Unser Toolpartner, die Firma Pengutronix, hostet offene Support-Mailinglisten für OSELAS (oselas.phytec@pengutronix.de) und PTXdist (ptxdist@pengutronix.de), für die Sie sich anmelden können. Besuchen Sie die Pengutronix - Maling Lists Seite um sich für die Mailinglisten anzumelden
<font size="2"></font>
<font size="2"><font size="4">Problem:</font></font>
<font size="2"></font><font size="3"><font face="Times New Roman">Where can I get access to the file that explains how to configure and update the boot loader?</font></font>
<font face="Arial" size="2"></font>
<font size="2"></font>
<font size="2"><font size="4">Solution:</font></font>
<font size="2"><font size="4"><font size="3"><font face="Times New Roman">Attached is the requested AppNote.</font></font></font></font>
<font size="2"></font>
Questions and answers about similar products
Gesamtstromaufnahmen gemessen bei 3,3V Eingangsspannung:
- beim Booten des Moduls: ~460 mA [~590 mA] (~780 mA)
- bei UBootbetrieb, Prompt: ~420 mA [~550 mA] (~ 740 mA)
- Dhystone2 Performancetest: ~473 mA [~625 mA] (~ 810 mA)
- Loading Kernel via Ethernet: --- [~630 mA] (~860 mA)
Platinenversionsnummern: PL 1245.2 [PL 1245.1] (PL 1245.0)
CPU: MPC5200B
CPU: it applies to all CPUs which contain the G2 Core
Inititialisation of the FPU is necessary after reset!!
Author: Jan Kobler, jankobler@koblersystems.de
Date: 2008.12.18
The following text can be copied into an assembler file.
This code has been compiled with the GNU Compiler gcc 4.3.2
and tested on a Phytec phyCORE-MPC5200B-I/O board.
#####################################################################################
# Initialisation of the FPU is necessary after reset!!
#
# G2 PowerPC Core Reference Manual, Rev. 1
# www.nxp.com
#
# G2CORERM.pdf page 86: Before the stfd instruction is used to store the contents
# of an FPR to memory, the FPR must have been initialized after reset (explicitly
# loaded with any value) by using a floating-point load instruction.
#
# G2CORERM.pdf page 211: After Hard Reset and Power-On Reset FPRs are in an unknown state
#
# A better explanation is in the errata of the IBM 750CXe
# URL: www-01.ibm.com
# 750CXe_Err_DD3.X.pdf page 9
# A stfd can cause the part to hang if its source FPR has powered up in a certain state.
#
#####################################################################################
# add to your startup code the function __fpu_init
.global __fpu_init
__fpu_init:
# Load any address into r3 which is 8byte aligned and has read access at
# the current state of the start up
# Here an address in the flash is loaded. When the board is booted
# high (0xfff00100) it is sure that the address 0xfff00000 can be read
# right after the reset
#
# load value 0xfff00000 into r3
lis r3, 0xfff0 #
#
lfd f0, 0(r3) # load floating-point double from address r3
lfd f1, 0(r3) # load floating-point double from address r3
lfd f2, 0(r3) # load floating-point double from address r3
lfd f3, 0(r3) # load floating-point double from address r3
lfd f4, 0(r3) # load floating-point double from address r3
lfd f5, 0(r3) # load floating-point double from address r3
lfd f6, 0(r3) # load floating-point double from address r3
lfd f7, 0(r3) # load floating-point double from address r3
lfd f8, 0(r3) # load floating-point double from address r3
lfd f9, 0(r3) # load floating-point double from address r3
lfd f10, 0(r3) # load floating-point double from address r3
lfd f11, 0(r3) # load floating-point double from address r3
lfd f12, 0(r3) # load floating-point double from address r3
lfd f13, 0(r3) # load floating-point double from address r3
lfd f14, 0(r3) # load floating-point double from address r3
lfd f15, 0(r3) # load floating-point double from address r3
lfd f16, 0(r3) # load floating-point double from address r3
lfd f17, 0(r3) # load floating-point double from address r3
lfd f18, 0(r3) # load floating-point double from address r3
lfd f19, 0(r3) # load floating-point double from address r3
lfd f20, 0(r3) # load floating-point double from address r3
lfd f21, 0(r3) # load floating-point double from address r3
lfd f22, 0(r3) # load floating-point double from address r3
lfd f23, 0(r3) # load floating-point double from address r3
lfd f24, 0(r3) # load floating-point double from address r3
lfd f25, 0(r3) # load floating-point double from address r3
lfd f26, 0(r3) # load floating-point double from address r3
lfd f27, 0(r3) # load floating-point double from address r3
lfd f28, 0(r3) # load floating-point double from address r3
lfd f29, 0(r3) # load floating-point double from address r3
lfd f30, 0(r3) # load floating-point double from address r3
lfd f31, 0(r3) # load floating-point double from address r3
blr # Branch
#####################################################################################
# call the function __fpu_init in your start up code
#
# at first the FPU has to be enabled by setting the FP bit (floating point available)
# in the MSR
#
# load the current value of the msr
mfmsr r3 # move msr into r3
ori r3, r3, 0x2000 # or immediate
mtmsr r3 # move r3 into msr
# save the new value into the msr
# now call the function __fpu_init
bl __fpu_init # Branch
# continue your own startup code
Auf der Homepage von NXP auf der MPC5200 Product Summary Page finden Sie Application Notes, Datasheets und Reference Manual und vieles mehr zu dem MPC5200 Controller